Patent Assignment
Reel/Frame 005962/0475
Assignment of Assignors Interest.
Recorded: 1992-01-06
Pages: 7
Assignors
MIYAYAMA, YOSHIYUKI
Executed: 1991-09-06
NGUYEN, LE TRONG
Executed: 1991-09-06
LENTZ, DEREK J.
Executed: 1991-09-06
HAGIWARA, YASUAKI
Executed: 1991-09-06
GARG, SANJIV
Executed: 1991-09-06
WANG, JOHANNES
Executed: 1991-09-06
Assignee
S-MOS SYSTEMS, INC. A CORPORATION OF CA
2460 NORTH FIRST STREET, SAN JOSE, CALIFORNIA
Covered Property
(1)
Risc Microprocessor Architecture Implementing Fast Trap and Exception State
Application:
07/726,942 →
Related Assignments
(1)
Other recorded transfers of the patent in this record — the chain of ownership.