Patent Assignment
Reel/Frame 006405/0218
Assignment of Assignors Interest.
Recorded: 1992-12-30
Pages: 2
Assignor
OZAKI, HIDEHARU
Executed: 1992-10-28
Assignee
NEC CORPORATION
7-1, SHIBA 5-CHOME, MINATO-KU, TOKYO, JAPAN
Covered Property
(1)
Semiconductor Integrated Logic Circuit with Internal Circuit to Be Examined by Scan Path Test Method
Patent:
5,425,034 →
Application:
07/967,727 →
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.