Patent Assignment
Reel/Frame 008012/0849
Assignment of Assignor's Interest
Recorded: 1996-05-20
Pages: 2
Assignor
ROY, RICHARD STEPHEN
Executed: 1996-05-20
Assignee
HITACHI MICRO SYSTEMS, INC.
179 EAST TASMAN DRIVE, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
Phase Linking of Output Clock with Master Clock in Memory Architecture
Patent:
5,805,873 →
Application:
08/650,415 →
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Merger
Nov 24, 2008
From: HITACHI MICRO SYSTEMS, INC.
To: HITACHI SEMICONDUCTOR (AMERICA) INC.
Reel/Frame 021876/0466 →
Change of Name
Nov 24, 2008
From: HITACHI SEMICONDUCTOR (AMERICA) INC.
To: RENESAS TECHNOLOGY AMERICA, INC.
Reel/Frame 021876/0496 →
Merger
May 13, 2010
From: RENESAS TECHNOLOGY AMERICA, INC.
To: RENESAS ELECTRONICS AMERICA INC.
Reel/Frame 024380/0300 →