Patent Assignment
Reel/Frame 009345/0856
Assignment of Assignor's Interest
Recorded: 1998-07-27
Pages: 2
Assignor
SAWADA, SEIJI
Executed: 1998-07-03
Assignee
MITSUBISHI DENKI KABUSHIKI KAISHA
2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO 100-8310, JAPAN
Covered Property
(1)
Clock Synchronous Semiconductor Memory Device Capable of Preventing Outputting of Invalid Data
Patent:
6,049,488 →
Application:
09/122,762 →
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Nov 12, 2010
From: RENASAS ELECTRONICS CORPORATION
To: DRAM MEMTECH LLC
Reel/Frame 025357/0988 →
Assignment of Assignor's Interest
Jan 31, 2011
From: RENESAS ELECTRONICS CORPORATION
To: DRAM MEMTECH LLC
Reel/Frame 025723/0127 →
Assignment of Assignor's Interest
Mar 5, 2011
From: DRAM MEMTECH LLC
To: DRAM MEMORY TECHNOLOGIES LLC
Reel/Frame 025904/0828 →