IP Library Assignment 009945/0471
Patent Assignment
Reel/Frame 009945/0471

Assignment of Assignor's Interest

Recorded: 1999-05-13 Pages: 3
Assignors
YUASA, HIROSHI
Executed: 1999-04-07
UEDA, SATOSHI
Executed: 1999-04-07
Assignee
MATSUSHITA ELECTRONICS CORPORATION
1-1, SAIWAI-CHO, TAKATSUKI-SHI, OSAKA, 569-1, JAPAN
Covered Property (1)
Method of Fabricating Interconnects Utilizing Flourine Doped Insulators and Barrier Layers
Patent: 6,277,730 →
Application: 09/249,844 →
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jun 7, 2001
From: MATSUSHITA ELECTRONICS CORPORATION
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 011855/0674 →