Patent Assignment
Reel/Frame 011629/0167
Assignment of Assignor's Interest
Recorded: 2001-03-21
Received: 2001-04-02
Pages: 3
Assignors
BANNO, KOJI
Executed: 2001-03-15
INUI, MASUO
Executed: 2001-03-15
NAWA, TAKANORI
Executed: 2001-03-15
OSAJIMA, TORU
Executed: 2001-03-15
SUZUKI, KENJI
Executed: 2001-03-15
TSUNETO, KOJI
Executed: 2001-03-15
YAMAMOTO, HIROYUKI
Executed: 2001-03-15
YONEDA, TAKASHI
Executed: 2001-03-15
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOMOE, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA 211-8588, JPX, JAPAN
Covered Property
(1)
Method of Designing Wiring for Power Sources in a Semiconductor Chip, and a Computer Product
Application:
09/812,552 →