IP Library Assignment 011651/0259
Patent Assignment
Reel/Frame 011651/0259

Assignment of Assignor's Interest

Recorded: 2001-03-21 Received: 2001-04-10 Pages: 6
Assignors
CLEEVES, JAMES M.
Executed: 2001-03-05
VYVODA, MICHAEL A.
Executed: 2001-03-07
Assignee
MATRIX SEMICONDUCTOR, INC.
3230 SCOTT BOULEVARD, SANTA CLARA, CA, 95050, UNITED STATES
Covered Property (1)
Method of Generating Integrated Circuit Feature Layout for Improved Chemical Mechanical Polishing
Application: 09/775,761 →