Patent Assignment
Reel/Frame 011749/0802
Assignment of Assignor's Interest
Recorded: 2001-04-30
Received: 2001-05-07
Pages: 2
Assignor
SATO, TAKAHIKO
Executed: 2001-04-25
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA, 211-8588, JPX, JAPAN
Covered Property
(1)
Semiconductor Integrated Circuit Having Circuit for Changing Timing of Inactivating Power-on Resetting Circuit
Application:
09/843,820 →