Patent Assignment
Reel/Frame 011772/0099
Assignment of Assignor's Interest
Recorded: 2001-04-27
Received: 2001-05-10
Pages: 4
Assignee
LOGICVISION, INC.
101 METRO DRIVE, THIRD FLOOR, SAN JOSE, CA, 95110, UNITED STATES
Covered Property
(1)
Method of Designing Circuit Having Multiple Test Access Ports, Circuit Produced Thereby and Method of Using Same
Application:
09/843,307 →