Patent Assignment
Reel/Frame 011902/0682
Assignment of Assignor's Interest
Recorded: 2001-06-04
Received: 2001-06-21
Pages: 2
Assignor
TETELBAUM, ALEXANDER
Executed: 2001-05-10
Assignee
LSI LOGIC CORPORATION
1551 MCCARTHY BOULEVARD, MILPITAS, CA, 95035, UNITED STATES
Covered Property
(1)
Method of Clock Buffer Partitioning to Minimize Clock Skew for an Integrated Circuit Design
Application:
09/875,314 →