IP Library Assignment 011909/0762
Patent Assignment
Reel/Frame 011909/0762

Assignment of Assignor's Interest

Recorded: 2001-06-11 Pages: 4
Assignors
GHARACHORLOO, KOUROSH
Executed: 2001-06-11
BARROSO, LUIZ A.
Executed: 2001-06-11
RAVISHANKAR, MOSUR K.
Executed: 2001-06-11
STETS, ROBERT J., JR.
Executed: 2001-06-11
Assignee
COMPAQ COMPUTER CORPORATION
20555 S.H. 249, LEGAL DEPARTMENT, MC 110701, HOUSTON, TEXAS
Covered Property (1)
Multiprocessor Cache Coherence System and Method in Which Processor Nodes and Input/Output Nodes Are Equal Participants
Patent: 6,675,265 →
Application: 09/878,984 →
Publication: US 2002/0010840
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Nov 3, 2006
From: COMPAQ COMPUTER CORPORATION
To: COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P.
Reel/Frame 018471/0962 →
Change of Name Nov 29, 2006
From: COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P.
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 018552/0946 →