Patent Assignment
Reel/Frame 012022/0079
Assignment of Assignor's Interest
Recorded: 2001-07-03
Received: 2001-08-02
Pages: 3
Assignor
UCHIYAMA, KIYOSHI
Executed: 2001-06-27
Assignee
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
KADOMA-SHI, 1006, OAZA KADOMA, OSAKA, JPX, 571-8, JAPAN
Covered Property
(1)
Integrated Circuit Device Including a Layered Superlattice Material with an Interface Buffer Layer
Application:
09/898,927 →