IP Library › Assignment 012049/0580
Patent Assignment
Reel/Frame 012049/0580

Assignment of Assignor's Interest

Recorded: 2001-08-06 Pages: 2
Assignors
MIYAZAKI, KO
Executed: 2001-07-18
EGUCHI, KAZUHIKO
Executed: 2001-06-28
TANIMOTO, TADAAKI
Executed: 2001-07-10
Assignee
HITACHI, LTD.
CHIYODA-KU, 6, KANDA SURUGADAI 4-CHOME, TOKYO, JAPAN
Covered Property (1)
Design Method for Logic Circuit, Design Support System for Logic Circuit and Readable Media
Patent: 6,622,292 →
Application: 09/921,794 →
Publication: US 2002/0032894
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Dec 11, 2003
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORPORATION
Reel/Frame 014244/0278 →
Change of Name Aug 13, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024864/0635 →
Merger Aug 13, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024879/0190 →