IP Library Assignment 012430/0150
Patent Assignment
Reel/Frame 012430/0150

Corrective Assignment to Add the Second Assignee Previously Omitted from the Recorded Document at Reel 012016 Frame 0036.

Recorded: 2002-01-08 Received: 2002-01-10 Pages: 3
Assignors
OKUDA, YUICHI
Executed: 2001-05-09
MIYASHITA, HIROKI
Executed: 2001-05-14
CHIGASAKI, HIDEO
Executed: 2001-05-15
Assignees
HITACHI, LTD.
6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU, TOKYO, JPX, JAPAN
HITACHI DEVICE ENGINEERING CO., LTD.
3681, HAYANO, MOBARA-SHI, CHIBA, JPX, JAPAN
Covered Property (1)
Clock Generation Circuit, Control Method of Clock Generation Circuit and Semiconductor Memory Device
Application: 09/908,857 →