IP Library › Assignment 012484/0274
Patent Assignment
Reel/Frame 012484/0274

Assignment of Assignor's Interest

Recorded: 2002-01-07 Pages: 4
Assignors
GHATACHORLOO, KOUROSH
Executed: 2002-01-07
BARROSO, LUIZ A.
Executed: 2002-01-07
RAVISHANKAR, MOSUR K.
Executed: 2002-01-07
STETS, JR., ROBERT J.
Executed: 2002-01-07
Assignee
COMPAQ INFORMATION TECHNOLOGIES GROUP LP
20555 SH 249 - MC 110701, HOUSTON, TEXAS, 77070
Covered Property (1)
Cache Coherence Protocol Engine and Method for Efficient Processing of Interleaved Memory Transactions in a Multiprocessor System
Patent: 6,622,218 →
Application: 10/042,029 →
Publication: US 2002/0087806
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Corrective Assignment to Correct the Inventor's Name Previously Recorded at Reel 012484 Frame 0274. (Assignment of Assignor's Interest) Mar 25, 2002
From: GHARACHORLOO, KOUROSH; BARROSO, LUIZ A.; RAVISHANKAR, MOSUR K.; STETS JR., ROBERT J.
To: COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P.
Reel/Frame 012728/0821 →
Change of Name Apr 7, 2006
From: COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P.
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 017435/0019 →
Assignment of Assignor's Interest Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →