Patent Assignment
Reel/Frame 012886/0001
SECURITY INTEREST
Recorded: 2002-04-29
Received: 2002-07-12
Pages: 5
Assignor
QUICKSILVER TECHNOLOGY INCORPORATED
Executed: 2002-04-26
Assignees
TECHFARM VENTURES, L.P.
200 W. EVELYN AVENUE, SUITE 100, MOUNTAIN VIEW, CA, 94041, UNITED STATES
TECHFARM VENTURES (Q) L.P.
200 W. EVELYN AVENUE, SUITE 100, MOUNTAIN VIEW, CA, 94041, UNITED STATES
EMERGING ALLIANCE FUND L.P.
200 W. EVELYN AVENUE, SUITE 100, MOUNTAIN VIEW, CA, 94041, UNITED STATES
SELBY VENTURES PARTNERS II, L.P.
200 W. ELEVYN AVENUE, SUITE 100, MOUNTAIN VIEW, CA, 94041, UNITED STATES
WILSON SONSINI GOODRICH & ROSATI, P.C.
200 W. EVELYN AVENUE, SUITE 100, MOUNTAIN VIEW, CA, 94041, UNITED STATES
Covered Applications
(41)
ONE-CHIP MICROCOMPUTER WITH ANALOG-TO-DIGITAL CONVERTER
App. No. 10/141,118
→
SURGICAL CUTTER WITH MODULAR BLADES
App. No. 10/141,895
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MULTIPLE CHAMBER SUCTION NOZZLE CONFIGURATION
App. No. 10/142,758
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Content based message dispatch
App. No. 10/141,464
→
NETWORKED MULTIPLE BINGO GAME SYSTEM
App. No. 10/142,138
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TWO-MEAL ANIMAL FEEDER DESIGN
App. No. 29/160,312
→
FORMING PATTERNED THIN FILM METAL LAYERS
App. No. 10/141,362
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METHOD AND APPARATUS FOR CONTROLLING TRANSMISSION POWER ASSOCIATED WITH A TRANSMITTING UNIT
App. No. 10/141,331
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METHOD AND APPARATUS FOR EFFICIENTLY DRIVING A LOW-VOLTAGE DEVICE FROM A WIDE-RANGE INPUT SUPPLY
App. No. 10/141,051
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REVERSIBLE FIELD-PROGRAMMABLE ELECTRIC INTERCONNECTS
App. No. 10/139,381
→
Method and system for data flow control of execution nodes of an adaptive computing engine (ACE)
App. No. 10/092,859
→
INTERFACE CIRCUIT FOR A DIFFERENTIAL SIGNAL
App. No. 10/078,974
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ROTARY VALVE FOR SINGLE-POINT COOLANT DIVERSION IN ENGINE COOLING SYSTEM
App. No. 10/074,902
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METHOD AND SYSTEM FOR IMPLEMENTING A SYSTEM ACQUISITION FUNCTION FOR USE WITH A COMMUNICATION DEVICE
App. No. 10/067,496
→
METHODS AND COMPOSITIONS FOR MICROARRAY CONTROL
App. No. 10/050,188
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APPARATUS AND METHOD FOR ADAPTIVE MULTIMEDIA RECEPTION AND TRANSMISSION IN COMMUNICATION ENVIRONMENTS
App. No. 10/040,100
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APPARATUS, METHOD AND SYSTEM FOR GENERATING A UNIQUE HARDWARE ADAPTATION INSEPARABLE FROM CORRESPONDINGLY UNIQUE CONTENT
App. No. 10/034,033
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IC FOR UNIVERSAL COMPUTING WITH NEAR ZERO PROGRAMMING COMPLEXITY
App. No. 10/029,502
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CONFIGURABLE FINITE STATE MACHINE FOR OPERATION OF MICROINSTRUCTION PROVIDING EXECUTION ENABLE CONTROL VALUE
App. No. 10/022,776
→
LOW I/O BANDWIDTH METHOD AND SYSTEM FOR IMPLEMENTING DETECTION AND IDENTIFICATION OF SCRAMBLING CODES
App. No. 10/015,531
→
METHOD AND SYSTEM FOR DETECTING AND IDENTIFYING SCRAMBLING CODES
App. No. 10/015,537
→
Method and system for managing hardware resources to implement system acquisition using an adaptive computing architecture
App. No. 10/015,544
→
USING TRANSITION TIME CHECKS TO DETERMINE NOISE PROBLEMS ON SIGNAL LINES OF AN INTEGRATED CIRCUIT
App. No. 10/017,865
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METHOD AND SYSTEM FOR MANAGING HARDWARE RESOURCES TO IMPLEMENT SYSTEM FUNCTIONS USING AN ADAPTIVE COMPUTING ARCHITECTURE
App. No. 10/015,530
→
SYSTEM FOR ADAPTING DEVICE STANDARDS AFTER MANUFACTURE
App. No. 10/013,825
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Method and system for digital watermarking
App. No. 10/020,149
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METHOD AND SYSTEM FOR INCREASING AVAILABILITY AND PROXIMITY OF BASE STATIONS FOR CELLULAR COMMUNICATIONS VIA MOBILE BASE STATIONS
App. No. 10/010,596
→
Method and system for providing consumer products in the embedded system market
App. No. 10/010,018
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APPARATUS, SYSTEM AND METHOD FOR CONFIGURATION OF ADAPTIVE INTEGRATED CIRCUITRY HAVING HETEROGENEOUS COMPUTATIONAL ELEMENTS
App. No. 09/997,530
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APPARATUS, METHOD, SYSTEM AND EXECUTABLE MODULE FOR CONFIGURATION AND OPERATION OF ADAPTIVE INTEGRATED CIRCUITRY HAVING FIXED, APPLICATION SPECIFIC COMPUTATIONAL ELEMENTS
App. No. 09/997,987
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SYSTEM FOR AUTHORIZING FUNCTIONALITY IN ADAPTABLE HARDWARE DEVICES
App. No. 09/998,006
→
Method and system for minimizing power consumption in embedded systems with clock enable control
App. No. 09/996,094
→
PREDICTIVE RESOURCE ALLOCATION IN COMPUTING SYSTEMS
App. No. 09/974,521
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ADAPTIVE COMPUTING ENGINE WITH DATAFLOW GRAPH BASED SEQUENCING IN RECONFIGURABLE MINI-MATRICES OF COMPOSITE FUNCTIONAL BLOCKS
App. No. 09/916,141
→
HIGH PERFORMANCE MEMORY EFFICIENT VARIABLE-LENGTH CODING DECODER
App. No. 09/916,161
→
Method and system for encoding instructions for a VLIW that reduces instruction memory requirements
App. No. 09/916,142
→
Method and system for an interconnection network to support communications among a plurality of heterogeneous processing elements
App. No. 09/898,350
→
ADAPTIVE, MULTIMODE RAKE RECEIVER FOR DYNAMIC SEARCH AND MULTIPATH RECEPTION
App. No. 09/871,049
→
Method and system for scheduling in an adaptable computing engine
App. No. 09/872,397
→
METHOD AND SYSTEM FOR RECONFIGURABLE CHANNEL CODING
App. No. 09/851,543
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ADAPTIVE INTEGRATED CIRCUITRY WITH HETEROGENEOUS AND RECONFIGURABLE MATRICES OF DIVERSE AND ADAPTIVE COMPUTATIONAL UNITS HAVING FIXED, APPLICATION SPECIFIC COMPUTATIONAL ELEMENTS
App. No. 09/815,122
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