IP Library › Assignment 013087/0746
Patent Assignment
Reel/Frame 013087/0746

Assignment of Assignor's Interest

Recorded: 2002-09-13 Received: 2002-09-13 Pages: 4
Assignor
Assignee
LATTICE SEMICONDUCTOR CORPORATION
5555 NE MOORE COURT, HILLSBORO, OR, 97124, UNITED STATES
Covered Properties (8)
Symmetrical Cml Logic Gate System
Application: 10/066,031 →
Multiple Width Random Number Generation
Application: 09/966,967 →
Low Voltage Bandgap Reference Circuit
Application: 09/941,454 →
Buffering for Lc-Based Stage
Application: 09/927,612 →
Coupling for Lc-Based Vco
Application: 09/927,289 →
High Speed Data Sampling with Reduced Metastability
Application: 09/885,243 →
Low Voltage, High Speed Cmos Cml Latch and Mux Devices
Application: 09/881,950 →
Low Jitter Integrated Phase Locked Loop with Broad Tuning Range
Application: 09/870,877 →