IP Library Assignment 013099/0641
Patent Assignment
Reel/Frame 013099/0641

Assignment of Assignor's Interest

Recorded: 2002-07-11 Pages: 2
Assignors
INOUE, YOSHIHIKO
Executed: 2002-04-19
MOTOMURA, HISASHI
Executed: 2002-04-24
HORIGUCHI, MASASHI
Executed: 2002-04-22
Assignees
HITACHI, LTD.
6, KANDA SURUGADAI 4-CHOME CHIYODA-KU,, TOKYO,, JAPAN
HITACHI ULSI SYSTEMS CO. LTD
22-1 JOSUIHONCHO 5-CHOME KODAIRA-SHI,, TOKYO,, JAPAN
Covered Property (1)
Semiconductor Memory Having Dynamic Memory Cells and a Redundancy Relief Circuit
Patent: 6,762,963 →
Application: 10/192,615 →
Publication: US 2003/0043672
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 1, 2003
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORPORATION
Reel/Frame 014568/0160 →
Merger Jul 7, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024662/0280 →
Assignment of Assignor's Interest May 9, 2014
From: HITACHI ULSI SYSTEMS CO., LTD.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 032859/0252 →