Patent Assignment
Reel/Frame 013609/0569
Assignment of Assignor's Interest
Recorded: 2002-12-24
Received: 2003-01-02
Pages: 2
Assignor
MIZUNO, NOBUYASU
Executed: 2002-11-18
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA, JPX, 211-8588, JAPAN
Covered Property
(1)
Pulse Width Detection Circuit Filtering the Input Signal and Generating a Binary Signal
Application:
10/327,094 →