Patent Assignment
Reel/Frame 013637/0189
Assignment of Assignor's Interest
Recorded: 2002-12-31
Received: 2003-01-10
Pages: 2
Assignor
RAZA, S. BABAR
Executed: 2002-12-22
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
3901 N. FIRST ST., SAN JOSE, CA, 95134, UNITED STATES
Covered Property
(1)
Logic for implementing a dual clock domain read access with predictable timing for bi-directional I/Os
Application:
60/437,303 →