IP Library Assignment 014045/0720
Patent Assignment
Reel/Frame 014045/0720

Assignment of Assignor's Interest

Recorded: 2003-05-07 Pages: 2
Assignors
TAKAZAWA, YOSHIO
Executed: 2003-03-05
YAMADA, TOSHIO
Executed: 2003-03-04
YANAGISAWA, KAZUMASA
Executed: 2003-03-05
HAYASAKA, TAKASHI
Executed: 2003-03-06
Assignees
HITACHI, LTD.
6, KANDA SURUGADAI 4-CHOME CHIYODA-KU, TOKYO, JAPAN
HITACHI ULSI SYSTEMS, CO., LTD.
22-1, JOSUIHONCHO 5-CHOME, KODAIRA-SHI, TOKYO, JAPAN
Covered Property (1)
Semiconductor Integrated Circuit and Testing Method Thereof
Patent: 7,222,272 →
Application: 10/430,319 →
Publication: US 2003/0222283
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 1, 2003
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORPORATION
Reel/Frame 014568/0160 →
Merger Jul 7, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024662/0280 →
Assignment of Assignor's Interest May 9, 2014
From: HITACHI ULSI SYSTEMS CO., LTD.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 032859/0252 →