Patent Assignment
Reel/Frame 014273/0703
Assignment of Assignor's Interest
Recorded: 2003-07-03
Pages: 7
Assignors
AU, MARIO
Executed: 2003-07-03
DUH, JIANN-JENG
Executed: 2003-07-03
LIEN, CHUEN-DER
Executed: 2003-07-03
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
2975 STENDER WAY, SANTA CLARA, CALIFORNIA, 95054
Covered Property
(1)
Fifo Memory Devices Having Multi-Port Cache Memory Arrays Therein That Support Hidden Edc Latency and Bus Matching and Methods of Operating Same