Patent Assignment
Reel/Frame 014462/0478
Assignment of Assignor's Interest
Recorded: 2003-09-05
Received: 2003-09-11
Pages: 6
Assignor
REAL COMMUNICATIONS, INC.
Executed: 2003-09-02
Assignee
REALTEK SEMICONDUCTOR CORPORATION
NO. 2, INDUSTRY E. RD. IX, SCIENCE-BASED INDUSTRIAL PARK, HSINCHU, TWX, R.O.C., TAIWAN
Covered Properties
(12)
Optical Reduction System with Elimination of Reticle Diffraction Induced Bias
Application:
10/366,614 →
Programmable task scheduler for use with multiport xDSL processing system
Application:
09/797,648 →
Mixed Hardware/Software Architecture and Method for Processing Xdsl Communications
Application:
09/797,793 →
Physical Medium Dependent Sub-System with Shared Resources for Multiport Xdsl System
Application:
09/798,113 →
Logical Pipeline for Data Communications System
Application:
09/798,054 →
System and Method for a Family of Digital Subscriber Line (Xdsl) Signal Processing Circuit Operating with an Internal Clock Rate That Is Higher Than All Communications Ports Operating with a Plurality of Port Sampling Clock Rates
Application:
09/797,789 →
Data Object Architecture and Method for Xdsl Asic Processor
Application:
09/797,755 →
Scaleable Architecture for Multiple-Port, System-on-Chip Adsl Communications Systems
Application:
09/797,633 →
Xdsl Symbol Processor & Method of Operating Same
Application:
09/797,782 →
xDSL function ASIC processor & method of operation
Application:
09/798,133 →
Xdsl Communications Systems Using Shared/Multi-Function Task Blocks
Application:
09/797,778 →
Transport Convergence Sub-System with Shared Resources for Multiport Xdsl System
Application:
09/797,634 →