Patent Assignment
Reel/Frame 015159/0619
Assignment of Assignor's Interest
Recorded: 2004-03-26
Pages: 2
Assignors
LU, HONGQIANG
Executed: 2004-03-17
BARTH, WILLIAM K.
Executed: 2004-03-17
BURKE, PETER A.
Executed: 2004-03-17
Assignee
LSI LOGIC CORPORATION
1621 BARBER LANE, MS D-106, MILPITAS, CALIFORNIA, 95035
Covered Property
(1)
Layout Design and Process to Form Nanotube Cell for Nanotube Memory Applications
Patent:
6,969,651 →
Application:
10/810,760 →
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
May 13, 2008
From: LSI LOGIC CORPORATION
To: NANTERO, INC.
Reel/Frame 020930/0839 →
License
Aug 20, 2008
From: NANTERO, INC.
To: LOCKHEED MARTIN CORPORATION
Reel/Frame 021411/0337 →
Assignment of Assignor's Interest
Aug 28, 2008
From: LSI CORPORATION
To: NANTERO, INC.
Reel/Frame 021450/0389 →