IP Library Assignment 015500/0553
Patent Assignment
Reel/Frame 015500/0553

Assignment of Assignor's Interest

Recorded: 2004-06-21 Pages: 2
Assignors
CHUANG, CHE-HAO
Executed: 2004-05-20
KER, MING-DOU
Executed: 2004-05-20
Assignee
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
BLDG. 51, 195 CHUNG HSING RD., SEC. 4, CHUTUNG, HSINCHU, R.O.C., TAIWAN
Covered Property (1)
Input Stage for Mixed-Voltage-Tolerant Buffer with Reduced Leakage
Patent: 7,504,861 →
Application: 10/871,348 →
Publication: US 2005/0110520
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Nov 17, 2006
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: TRANSPACIFIC IP LTD.
Reel/Frame 018532/0085 →
Assignment of Assignor's Interest Jan 3, 2007
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: TRANSPACIFIC IP, LTD.
Reel/Frame 018721/0332 →
Corrective Assignment, Reel Frame #018721/0332, Execution Date 11/15/2006 Aug 20, 2007
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: TRANSPACIFIC IP, LTD.
Reel/Frame 019719/0099 →
Assignment of Assignor's Interest Oct 3, 2024
From: TRANSPACIFIC IP LTD.
To: SUMIKO CAPITAL LLC
Reel/Frame 068784/0299 →