IP Library Assignment 015726/0162
Patent Assignment
Reel/Frame 015726/0162

ASSIGNMENT OF ASSIGNOR'S INTEREST

Recorded: 2005-02-16 Received: 2005-02-16 Pages: 3
Assignor
SCHEUERLEIN, ROY E.
Executed: 2005-02-09
Assignee
MATRIX SEMICONDUCTOR, INC.
3230 SCOTT BLVD, LEGAL DEPT, SANTA CLARA, CA, 95054, UNITED STATES
Covered Applications (2)
STRUCTURE AND METHOD FOR BIASING PHASE CHANGE MEMORY ARRAY FOR RELIABLE WRITING
App. No. 11/040,262
METHOD FOR PRIORITIZING GROUPED DATA REDUCTION
App. No. 10/923,576