IP Library Assignment 015751/0463
Patent Assignment
Reel/Frame 015751/0463

Assignment of Assignor's Interest

Recorded: 2004-09-02 Pages: 2
Assignor
HOMEWOOD, MARK OWEN
Executed: 2004-07-14
Assignee
STMICROELECTRONICS LIMITED
100 AZTEC WEST, ALMONDSBURY, BRISTOL BS12 4SQ, UNITED KINGDOM
Covered Property (1)
Cache Memory System with Multiple Ports Cache Memories Capable of Receiving Tagged and Untagged Requests
Patent: 7,373,458 →
Application: 10/864,916 →
Publication: US 2004/0268048
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest May 31, 2016
From: STMICROELECTRONICS LIMITED
To: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
Reel/Frame 038847/0890 →