IP Library › Assignment 016144/0748
Patent Assignment
Reel/Frame 016144/0748

Assignment of Assignor's Interest

Recorded: 2005-01-10 Pages: 3
Assignor
FUTATSUYAMA, TAKUYA
Executed: 2004-10-14
Assignee
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME, MINATO-KU, TOKYO 105-8001, JAPAN
Covered Property (1)
Pattern Layout of Word Line Transfer Transistors in Nand Flash Memory Which Executes Subblock Erase
Patent: 7,057,915 →
Application: 10/947,131 →
Publication: US 2005/0141284
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
Merger Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
Change of Name and Address Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
Change of Name and Address Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →