IP Library Assignment 018057/0325
Patent Assignment
Reel/Frame 018057/0325

Assignment of Assignor's Interest

Recorded: 2006-06-30 Pages: 3
Assignors
ISHII, MASASHI
Executed: 2006-06-16
HIROTA, TAKANORI
Executed: 2006-06-16
ISHIBASHI, ATSUHIKO
Executed: 2006-06-16
HAYAKAWA, YASUSHI
Executed: 2006-06-16
OSHITA, TAKESHI
Executed: 2006-06-16
OTA, YOSHIYUKI
Executed: 2006-06-16
Assignee
RENESAS TECHNOLOGY CORP.
4-1, MAROUCHI 2-CHOME, CHIYODA-KU, TOKYO 100-6334, JAPAN
Covered Property (1)
Clock Data Recovery Circuit Capable of Generating Clock Signal Synchronized with Data Signal
Patent: 7,822,158 →
Application: 11/477,597 →
Publication: US 2007/0018704
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Correction to Assignee's Address Recorded at Reel 018057, Frame 0325. Sep 21, 2006
From: ISHII, MASASHI; HIROTA, TAKANORI; ISHIBASHI, ATSUHIKO; HAYAKAWA, YASUSHI
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 018327/0479 →
Change of Name Sep 15, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024990/0059 →
Merger Sep 15, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024990/0098 →