IP Library Assignment 018112/0344
Patent Assignment
Reel/Frame 018112/0344

Assignment of Assignor's Interest

Recorded: 2006-07-17 Pages: 3
Assignors
SUTO, HIROYUKI
Executed: 2006-06-13
KANEGAE, MASAHIDE
Executed: 2006-06-13
KAWASHIMA, OSAMU
Executed: 2006-06-13
UMEDA, MICHIHIKO
Executed: 2006-06-13
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN
Covered Property (1)
Method of Test of Clock Generation Circuit in Electronic Device, and Electronic Device
Patent: 7,272,527 →
Application: 11/487,504 →
Publication: US 2007/0233411
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 26, 2009
From: FUJITSU LIMITED
To: TOSHIBA STORAGE DEVICE CORPORATION
Reel/Frame 023861/0881 →