IP Library Assignment 018258/0492
Patent Assignment
Reel/Frame 018258/0492

Assignment of Assignor's Interest

Recorded: 2006-08-31 Pages: 2
Assignors
UEHARA, KEITARO
Executed: 2006-07-05
OKITSU, JUN
Executed: 2006-07-05
MURAKAMI, YOSHIKI
Executed: 2006-07-07
Assignee
HITACHI, LTD.
6-6 MARUNOUCHI 1-CHOME, CHIYODA-KU, TOKYO, JAPAN
Covered Property (1)
Cache Coherency Control Method, Chipset, and Multi-Processor System
Patent: 7,613,885 →
Application: 11/513,378 →
Publication: US 2007/0156972