IP Library Assignment 018355/0953
Patent Assignment
Reel/Frame 018355/0953

Assignment of Assignor's Interest

Recorded: 2006-09-26 Pages: 4
Assignors
COUSIN, JEAN-PHILIPPE
Executed: 2006-08-22
BERENGUER, JEAN-JOSE
Executed: 2006-08-22
PELISSIER, GILLES
Executed: 2006-08-22
Assignee
STMICROELECTRONICS S.A.
29, BOULEVARD ROMAIN ROLLAND, 92120 MONTROUGE, FRANCE
Covered Property (1)
Cache Consistency in a Multiprocessor System with Shared Memory
Patent: 7,743,217 →
Application: 11/475,844 →
Publication: US 2007/0016730
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Feb 26, 2016
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS INTERNATIONAL NV
Reel/Frame 037841/0686 →
Assignment of Assignor's Interest Jun 23, 2016
From: STMICROELECTRONICS INTERNATIONAL NV
To: FRANCE BREVETS
Reel/Frame 039140/0584 →
Assignment of Assignor's Interest May 23, 2022
From: FRANCE BREVETS
To: MICROELECTRONIC INNOVATIONS, LLC
Reel/Frame 060161/0346 →
Corrective Assignment to Correct the the Assignee Address Previously Recorded at Reel: 060161 Frame: 0346. Assignor(S) Hereby Confirms the Assignment. Jun 16, 2022
From: FRANCE BREVETS
To: MICROELECTRONIC INNOVATIONS, LLC
Reel/Frame 060389/0768 →