IP Library Assignment 018618/0297
Patent Assignment
Reel/Frame 018618/0297

Assignment of Assignor's Interest

Recorded: 2006-12-12 Pages: 3
Assignors
MORI, KAORU
Executed: 2004-02-23
MORI, KATUHIRO
Executed: 2004-02-23
YAMADA, SHINICHI
Executed: 2004-02-23
KAWABATA, KUNINORI
Executed: 2004-02-23
ITO, SHIGEMASA
Executed: 2004-02-23
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI,, KANAGAWA, 211-8588, JAPAN
Covered Property (1)
Semiconductor Memory Device with Shift Register-Based Refresh Address Generation Circuit
Patent: 7,286,434 →
Application: 11/486,002 →
Publication: US 2006/0256638
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Dec 12, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021998/0645 →
Change of Name Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
Assignment of Assignor's Interest Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0337 →