IP Library Assignment 018778/0017
Patent Assignment
Reel/Frame 018778/0017

Assignment of Assignor's Interest

Recorded: 2007-01-09 Pages: 4
Assignor
S-MOS SYSTEMS, INC.
Executed: 1994-09-13
Assignee
SEIKO EPSON CORPORATION
4-1 NISHISHINJUKU 2-CHOME, SHINJUKU-KU, TOKYO, JAPAN
Covered Property (1)
Risc Microprocessor Architecture Implementing Multiple Typed Register Sets
Patent: 7,685,402 →
Application: 11/651,009 →
Publication: US 2007/0113047
Related Assignments (6)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 9, 2007
From: GARG, SANJIV; LENTZ, DEREK J.; NGUYEN, LE TRONG; CHEN, SHO LONG
To: S-MOS SYSTEMS, INC.
Reel/Frame 018779/0969 →
Assignment of Assignor's Interest Jan 9, 2007
From: SEIKO EPSON CORPORATION
To: TRANSMETA CORPORATION
Reel/Frame 018780/0677 →
Assignment of Assignor's Interest Mar 4, 2009
From: TRANSMETA LLC
To: INTELLECTUAL VENTURE FUNDING LLC
Reel/Frame 022343/0219 →
Merger Apr 3, 2009
From: TRANSMETA CORPORATION
To: TRANSMETA LLC
Reel/Frame 022494/0500 →
Assignment of Assignor's Interest Jan 4, 2020
From: INTELLECTUAL VENTURES ASSETS 158 LLC
To: HANGER SOLUTIONS, LLC
Reel/Frame 051486/0425 →
Assignment of Assignor's Interest Feb 1, 2020
From: INTELLECTUAL VENTURES HOLDING 81 LLC
To: INTELLECTUAL VENTURES ASSETS 158 LLC
Reel/Frame 051777/0017 →