IP Library Assignment 019480/0725
Patent Assignment
Reel/Frame 019480/0725

Assignment of Assignor's Interest

Recorded: 2007-06-26 Pages: 4
Assignors
PAPPALARDO, FRANCESCO
Executed: 2007-05-08
NOTARANGELO, GIUSEPPE
Executed: 2007-05-07
SALURSO, ELENA
Executed: 2007-05-07
GUIDETTI, ELIO
Executed: 2007-05-30
Assignees
STMICROELECTRONICS S.R.L.
VIA C. OLIVETTI, 2, AGRATE BRIANZA (MI), 20041, ITALY
STMICROELECTRONICS N.V.
WTC SCHIPHOL AIRPORT, SCHIPHOL BOULEVAARD 265, AMSTERDAM, NL-1118 BH, NETHERLANDS
Covered Property (1)
Method and Arrangement for Cache Memory Management, Related Processor Architecture
Patent: 8,078,804 →
Application: 11/768,462 →
Publication: US 2008/0016317
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Dec 20, 2022
From: STMICROELECTRONICS N.V.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 062201/0917 →