IP Library › Assignment 019499/0401
Patent Assignment
Reel/Frame 019499/0401

Assignment of Assignor's Interest

Recorded: 2007-06-29 Pages: 6
Assignors
DJURDJEVIC, IVANA
Executed: 2007-06-11
GALBRAITH, RICHARD LEO
Executed: 2007-06-13
WILSON, BRUCE ALEXANDER
Executed: 2007-06-13
LEE, YUAN XING
Executed: 2007-06-15
OENNING, TRAVIS ROGER
Executed: 2007-06-12
BLAUM, MARIO
Executed: 2007-06-11
LAKOVIC, KSENIJA
Executed: 2007-06-12
LI, ZONGWANG
Executed: 2007-06-18
Assignee
HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS, B.V.
LOCATELLIKADE 1, 1076 AZ AMSTERDAM, 1070 AE AMSTERDAM, AMSTERDAM, NETHERLANDS
Covered Property (1)
Techniques for Generating Bit Reliability Information in the Post Processor
Patent: 8,037,393 →
Application: 11/771,226 →
Publication: US 2009/0006930
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name Oct 25, 2012
From: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
To: HGST NETHERLANDS B.V.
Reel/Frame 029341/0777 →
Assignment of Assignor's Interest Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040821/0550 →