IP Library › Assignment 020225/0320
Patent Assignment
Reel/Frame 020225/0320

Assignment of Assignor's Interest

Recorded: 2007-12-11 Pages: 4
Assignors
SHIMADA, JUNICHI
Executed: 2007-04-17
KIMURA, FUMIHIRO
Executed: 2007-04-17
MATSUMURA, YOICHI
Executed: 2007-04-17
OHASHI, TAKAKO
Executed: 2007-04-17
IWAUCHI, NOBUYUKI
Executed: 2007-04-17
FUJINO, TAKEYA
Executed: 2007-04-17
ARAKI, TAKAYUKI
Executed: 2007-04-18
HASHIMOTO, YUKIJI
Executed: 2007-04-17
YASUI, TAKUYA
Executed: 2007-04-17
TAGUCHI, HIROFUMI
Executed: 2007-04-18
Assignee
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
1006 OAZA KADOMA, KADOMA-SHI, OSAKA, 571-8501, JAPAN
Covered Property (1)
Semiconductor Device and Semiconductor Device Layout Designing Method
Patent: 8,028,264 →
Application: 11/790,736 →
Publication: US 2007/0252258
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0534 →
Assignment of Assignor's Interest May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →