IP Library Assignment 020273/0318
Patent Assignment
Reel/Frame 020273/0318

Assignment of Assignor's Interest

Recorded: 2007-12-10 Pages: 2
Assignors
OSADA, KENICHI
Executed: 2003-10-21
KAWAHARA, TAKAYUKI
Executed: 2003-10-22
YAMAGUCHI, KEN
Executed: 2003-10-21
SAITO, YOSHIKAZU
Executed: 2003-10-27
KITAI, NAOKI
Executed: 2003-10-21
Assignees
RENESAS TECHNOLOGY CORP.
4-1, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO, JAPAN
HITACHI ULSI SYSTEMS CO., LTD.
22-1, JOSUIHONCHO 5-CHOME, KODAIRA-SHI, TOKYO, JAPAN
Covered Property (1)
Semiconductor Memory Device Layout Comprising High Impurity Well Tap Areas for Supplying Well Voltages to N Wells and P Wells
Patent: 7,692,943 →
Application: 12/000,135 →
Publication: US 2008/0094869
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Merger Sep 21, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025026/0660 →