Patent Assignment
Reel/Frame 020401/0118
Assignment of Assignor's Interest
Recorded: 2008-01-23
Pages: 2
Assignor
KOWATARI, SATOSHI
Executed: 2007-10-23
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI,, KANAGAWA, 211-8588, JAPAN
Covered Property
(1)
Apparatus, Method, and Program for Verifying Logic Circuit Operating with Multiple Clock Signals
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Dec 11, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021977/0219 →
Change of Name
Sep 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 025046/0478 →
Assignment of Assignor's Interest
Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →