Assignment of Assignor's Interest

Recorded: 2008-08-11 Pages: 4

Assignors

KINOSHITA, SHUUETSU

Executed: 2008-06-27

SHINDATE, KENICHI

Executed: 2008-06-27

ISHIDA, KEITARO

Executed: 2008-06-24

Assignee

OKI ELECTRIC INDUSTRY CO., LTD.

7-12, TORANOMON, 1-CHOME, MINATO-KU, TOKYO, 105-8460, JAPAN

Covered Property (1)

Method of Designing a Circuit for Optimizing Output Bit Length and Integrated Circuit Therefor

Application: 12/189,408 →

Publication: US 2009/0049417

Related Assignments (1)

Other recorded transfers of the patent in this record — the chain of ownership.