IP Library Assignment 022116/0944
Patent Assignment
Reel/Frame 022116/0944

Assignment of Assignor's Interest

Recorded: 2009-01-16 Pages: 2
Assignor
NISHIDA, YASUSHI
Executed: 2008-10-09
Assignee
PANASONIC CORPORATION
1006 OAZA KADOMA, KADOMA-SHI, OSAKA, 571-8501, JAPAN
Covered Property (1)
Semiconductor Memory Device Having a Word Line Activation Circuit a Nd/or a Bit Line Activation Circuit and a Redundant Word Line Activation Circuit and/or a Redundant Bit Line Activation Circuit
Patent: 7,782,706 →
Application: 12/258,835 →
Publication: US 2009/0122624
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →