Assignment of Assignor's Interest

Recorded: 2009-03-20 Pages: 3

Assignors

IGETA, MITSUAKI

Executed: 2009-02-04

SUEDA, MASAHIRO

Executed: 2009-02-04

TAKASE, RIKIO

Executed: 2009-02-04

USUJIMA, AKIHIRO

Executed: 2009-02-04

Assignee

FUJITSU MICROELECTRONICS LIMITED

7-1, NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU,, TOKYO, 163-0722, JAPAN

Covered Property (1)

Method of Patterning a Semiconductor Device by Arranging a Dummy Active Region Between Active Regions

Application: 12/407,158 →

Publication: US 2009/0315139

Related Assignments (1)

Other recorded transfers of the patent in this record — the chain of ownership.