IP Library Assignment 023125/0119
Patent Assignment
Reel/Frame 023125/0119

Assignment of Assignor's Interest

Recorded: 2009-08-20 Pages: 2
Assignors
YOSHIKAWA, TAKASHI
Executed: 2009-06-15
ASANO, SHIGEHIRO
Executed: 2009-06-15
Assignee
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME, MINATO-KU,, TOKYO, 105-8001, JAPAN
Covered Property (1)
Selecting Configuration Memory Address for Execution Circuit Conditionally Based on Input Address or Computation Result of Preceding Execution Circuit as Address
Patent: 8,402,251 →
Application: 12/544,122 →
Publication: US 2010/0122071