IP Library Assignment 023540/0205
Patent Assignment
Reel/Frame 023540/0205

Assignment of Assignor's Interest

Recorded: 2009-11-18 Pages: 3
Assignors
JERABEK, TOMAS
Executed: 2009-07-22
NAPRAVNIK, KAREL
Executed: 2009-07-22
Assignee
STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
POBREZNI 620/3, PRAHA 8, 186 00, CZECH REPUBLIC
Covered Property (1)
Logic Level Converter
Patent: 8,040,172 →
Application: 12/621,380 →
Publication: US 2010/0156499
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Feb 26, 2016
From: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
To: STMICROELECTRONICS INTERNATIONAL NV
Reel/Frame 037841/0725 →
Assignment of Assignor's Interest Jun 23, 2016
From: STMICROELECTRONICS INTERNATIONAL NV
To: FRANCE BREVETS
Reel/Frame 039140/0584 →
Assignment of Assignor's Interest May 23, 2022
From: FRANCE BREVETS
To: MICROELECTRONIC INNOVATIONS, LLC
Reel/Frame 060161/0346 →
Corrective Assignment to Correct the the Assignee Address Previously Recorded at Reel: 060161 Frame: 0346. Assignor(S) Hereby Confirms the Assignment. Jun 16, 2022
From: FRANCE BREVETS
To: MICROELECTRONIC INNOVATIONS, LLC
Reel/Frame 060389/0768 →