IP Library Assignment 025042/0204
Patent Assignment
Reel/Frame 025042/0204

Assignment of Assignor's Interest

Recorded: 2010-09-24 Pages: 3
Assignors
LU, SHIH-LIEN
Executed: 2010-09-24
WU, WEI
Executed: 2010-09-24
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95052
Covered Property (1)
Error Correcting Code Logic for Processor Caches That Uses a Common Set of Check Bits
Patent: 8,533,572 →
Application: 12/890,468 →
Publication: US 2012/0079342
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072915/0599 →