IP Library Assignment 025485/0031
Patent Assignment
Reel/Frame 025485/0031

Assignment of Assignor's Interest

Recorded: 2010-12-09 Pages: 4
Assignor
S-MOS SYSTEMS, INC.
Executed: 1994-09-13
Assignee
SEIKO EPSON CORPORATION
4-1 NISHISHINJUKU 2-CHOME, SHINJUKU-KU, TOYKO, JAPAN
Covered Property (1)
Risc Microprocessor Architecture Implementing Multiple Typed Register Sets
Patent: 7,941,636 →
Application: 12/650,998 →
Publication: US 2010/0106942
Related Assignments (6)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Dec 9, 2010
From: GARG, SANJIV; LENTZ, DEREK J.; NGUYEN, LE TRONG; CHEN, SHO-LONG
To: S-MOS SYSTEMS, INC.
Reel/Frame 025484/0381 →
Assignment of Assignor's Interest Dec 9, 2010
From: SEIKO EPSON CORPORATION
To: TRANSMETA CORPORATION
Reel/Frame 025485/0072 →
Merger Dec 9, 2010
From: TRANSMETA CORPORATION
To: TRANSMETA LLC
Reel/Frame 025485/0096 →
Assignment of Assignor's Interest Dec 9, 2010
From: TRANSMETA LLC
To: INTELLECTUAL VENTURE FUNDING LLC
Reel/Frame 025485/0142 →
Assignment of Assignor's Interest Jan 4, 2020
From: INTELLECTUAL VENTURES ASSETS 158 LLC
To: HANGER SOLUTIONS, LLC
Reel/Frame 051486/0425 →
Assignment of Assignor's Interest Feb 1, 2020
From: INTELLECTUAL VENTURES HOLDING 81 LLC
To: INTELLECTUAL VENTURES ASSETS 158 LLC
Reel/Frame 051777/0017 →