IP Library Assignment 025724/0110
Patent Assignment
Reel/Frame 025724/0110

Assignment of Assignor's Interest

Recorded: 2011-01-31 Pages: 2
Assignors
SATO, TAKASHI
Executed: 2011-01-05
SARUWATARI, TOSHIAKI
Executed: 2011-01-05
RYU, KEN
Executed: 2011-01-05
Assignee
FUJITSU SEMICONDUCTOR LIMITED
2-10-23 SHIN-YOKOHAMA, KOHOKU-KU, YOKOHAMA-SHI, KANAGAWA, 222-0033, JAPAN
Covered Property (1)
Semiconductor Integrated Circuit, Operating Method of Semiconductor Integrated Circuit, and Debug System
Patent: 8,595,562 →
Application: 13/014,318 →
Publication: US 2011/0302456
Related Assignments (5)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
Security Interest Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
Assignment and Assumption of Security Interest in Intellectual Property Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
Corrective Assignment to Correct the 8647899 Previously Recorded on Reel 035240 Frame 0429. Assignor(S) Hereby Confirms the Security Interst. Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
Release of Security Interest Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →