Patent Assignment
Reel/Frame 025898/0175
Assignment of Assignor's Interest
Recorded: 2011-03-03
Pages: 4
Assignors
SAKAUE, KENJI
Executed: 2011-02-17
ISHIKAWA, TATSUYUKI
Executed: 2011-02-18
ISHIKAWA, YUKIO
Executed: 2011-02-18
ICHIKAWA, KAZUHIRO
Executed: 2011-02-18
UCHIKAWA, HIRONORI
Executed: 2011-02-21
Assignee
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME, MINATO-KU, TOKYO, JAPAN
Covered Property
(1)
Error Detection/Correction Circuit, Memory Controller and Semiconductor Memory Apparatus