Patent Assignment
Reel/Frame 026795/0644
Corrective Assignment to Correct the Assignee Previously Recorded on Reel 021731 Frame 0700. Assignor(S) Hereby Confirms the Correct Assignees Are Sun Microsystems, Inc. and Sun Microsystems Technology Ltd.
Recorded: 2011-08-23
Received: 2011-08-23
Pages: 8
Assignor
MONTALVO SYSTEMS, INC.
Executed: 2008-04-17
Assignees
SUN MICROSYSTEMS, INC.
4150 NETWORK CIRCLE, SANTA CLARA, CA, 95054, UNITED STATES
SUN MICROSYSTEMS TECHNOLOGY LTD.
CEDAR HOUSE, 41 CEDAR AVENUE, HAMILTON, BMX, HM12, BERMUDA
Covered Properties
(26)
Positive Detection of Engine Position During Engine Starting
Application:
13/107,218 →
Controlling Operation of a Processor According to Execution Mode of an Instruction Sequence
Application:
11/774,583 →
Re-Fetching Cache Memory Enabling Alternative Operational Modes
Application:
11/751,973 →
Re-Fetching Cache Memory Having Coherent Re-Fetching
Application:
11/751,985 →
Re-Fetching Cache Memory Enabling Low-Power Modes
Application:
11/751,949 →
Reduced-Power Memory with Per-Sector Power/Ground Control and Early Address
Application:
11/740,901 →
Reduced-Power Memory with Per-Sector Ground Control
Application:
11/740,892 →
Prediction of Data Values Read from Memory by a Microprocessor Using a Dynamic Confidence Threshold
Application:
11/645,901 →
Microarchitecture for Compact Storage of Embedded Constants
Application:
11/566,206 →
Executing Functions Determined via a Collection of Operations from Translated Instructions
Application:
11/561,287 →
Trace Optimization via Fusing Operations of a Target Architecture Operation Set
Application:
11/561,274 →
Flag Management in Processors Enabled for Speculative Execution of Micro-Operation Traces
Application:
11/553,453 →
Flag Management in Processors Enabled for Speculative Execution of Micro-Operation Traces
Application:
11/553,458 →
Flag Management in Processors Enabled for Speculative Execution of Micro-Operation Traces
Application:
11/553,455 →
Trace Cache for Efficient Self-Modifying Code Processing
Application:
11/535,977 →
Method of Testing a Substrate Using Multriple Image-Obtaining Units and Apparatus for Performing the Same
Application:
11/525,971 →
Plunger Driving Structure
Application:
11/525,972 →
Mechanisms for Software (OS) to Control Threads Between Multiple Cores
Application:
11/279,882 →
Improved Prefetch Hardware Efficiency via Prefetch Hint Instructions
Application:
11/279,880 →
Objective-Directed Mechanisms for Software (OS) to Control Thread Migration
Application:
11/279,883 →
Adaptive Computing Ensemble Microprocessor Architecture
Application:
11/277,761 →
Software Hint to Specify the Preferred Branch Prediction to Use for a Branch Instruction
Application:
11/306,000 →
Field-Programmable Dynamic Logic Array
Application:
10/071,966 →
Dynamic Programmable Logic Array That Can Be Reprogrammed and a Method of Use
Application:
10/054,471 →
Operand File Using Pointers and Reference Counters and a Method of Use
Application:
10/004,338 →
Method and System for Programmable Replacement Mechanism for Caching Devices
Application:
10/045,127 →