IP Library Assignment 028188/0283
Patent Assignment
Reel/Frame 028188/0283

Change of Name

Recorded: 2012-05-10 Pages: 3
Assignor
PICOCHIP LIMITED
Executed: 2012-03-08
Assignee
MINDSPEED TECHNOLOGIES U.K., LIMITED
UPPER BOROUGH COURTS, UPPER BOROUGH WALLS, BATH, BA1 1RG, UNITED KINGDOM
Covered Properties (19)
Processor Architecture
Patent: 8,386,752 →
Application: 10/450,615 →
Publication: US 2005/0076187
Processor Array
Patent: 7,549,081 →
Application: 10/521,889 →
Publication: US 2005/0257105
Array Synchronisation with Counters
Patent: 7,603,541 →
Application: 10/539,337 →
Publication: US 2006/0168423
Processor Array Including Delay Elements Associated with Primary Bus Nodes
Patent: 7,574,582 →
Application: 10/543,370 →
Publication: US 2006/0155956
Communications in a Processor Array
Patent: 7,987,340 →
Application: 10/546,616 →
Publication: US 2007/0083791
Processor Architecture for Processing Variable Length Instruction Words
Patent: 9,104,426 →
Application: 11/981,973 →
Publication: US 2008/0065859
Processor Architecture with Switch Matrices for Transferring Data Along Buses
Patent: 7,996,652 →
Application: 12/070,790 →
Publication: US 2008/0222339
Power Control
Patent: 8,559,998 →
Application: 12/264,531 →
Publication: US 2009/0149211
Generating Debug Information
Application: 12/265,152 →
Publication: US 2009/0150420
Femtocell Device
Patent: 8,160,011 →
Application: 12/355,002 →
Publication: US 2009/0187690
Signal Routing in Processor Arrays
Patent: 8,077,623 →
Application: 12/367,814 →
Publication: US 2009/0210652
Process Placement in a Processor Array
Patent: 8,352,955 →
Application: 12/368,836 →
Publication: US 2009/0210881
Allocating Resources in a Multicore Environment
Application: 12/431,750 →
Publication: US 2010/0023948
Communication Network
Patent: 8,385,928 →
Application: 12/538,311 →
Publication: US 2010/0035617
Rake Receiver
Application: 12/645,689 →
Publication: US 2011/0002426
Methods and Devices for Reducing Interference in an Uplink
Patent: 8,423,072 →
Application: 12/773,970 →
Publication: US 2010/0285795
Method and Device in a Communication Network
Patent: 8,463,312 →
Application: 12/794,128 →
Publication: US 2010/0311449
Method and Device in a Communication Network
Patent: 8,385,836 →
Application: 12/794,254 →
Publication: US 2010/0311412
Processor Architecture with Switch Matrices for Transferring Data Along Buses
Patent: 8,904,148 →
Application: 13/176,381 →
Publication: US 2012/0191945
Related Assignments (7)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 15, 2010
From: TOWNER, DANIEL
To: PICOCHIP DESIGNS LIMITED
Reel/Frame 023790/0927 →
Assignment of Assignor's Interest Jun 27, 2013
From: CLAYDON, ANTHONY PETER JOHN; CLAYDON, ANNE PATRICIA
To: PICOCHIP DESIGNS LIMITED
Reel/Frame 030741/0886 →
Assignment of Assignor's Interest Sep 30, 2013
From: DULLER, ANDREW; PANESAR, GAJINDER; CLAYDON, PETER; ROBBINS, WILLIAM
To: PICOCHIP DESIGNS LIMITED
Reel/Frame 031312/0818 →
Assignment of Assignor's Interest Feb 28, 2014
From: MINDSPEED TECHNOLOGIES, INC.; MINDSPEED TECHNOLOGIES U.K., LIMITED; MINDSPEED TELECOMMUNICATIONS TECHNOLOGIES DEVELOPMENT (SHENSHEN) CO. LTD.; PICOCHIP (BEIJING) TECHNOLOGY COMPANY LIMITED
To: INTEL CORPORATION
Reel/Frame 032372/0154 →
Assignment of Assignor's Interest Mar 20, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 052916/0308 →
Assignment of Assignor's Interest Jun 25, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053065/0627 →
Assignment of Assignor's Interest Jun 25, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053066/0001 →